_raw_readb(a) (__chk_io_ptr(a), *(volatile unsigned char __force *)(a))
#define __raw_readw(a) (__chk_io_ptr(a), *(volatile unsigned short __force *)(a))
#define __raw_readl(a) (__chk_io_ptr(a), *(volatile unsigned int __force *)(a))
return 0;
}
Èç¹ûÕë¶ÔGPXÇé¿ö
int s3c_gpio_setcfg_s3c24xx(struct s3c_gpio_chip *chip,
unsigned int off, unsigned int cfg)
{
void __iomem *reg = chip->base;
unsigned int shift = off * 2; // ÿ¸öGPX¶ÔÓ¦2λ
u32 con;
if (s3c_gpio_is_cfg_special(cfg)) {
cfg &= 0xf;
if (cfg > 3)
return -EINVAL;
cfg <<= shift; // ½«cfgµÄ0,1Á½Î»×óÒÆoffset
}
con = __raw_readl(reg); // ¶Á¶ÔÓ¦µÄGPXCONÖµ
con &= ~(0x3 << shift); // ½«GPXCON£¨pin£©µÄÁ½bitsÇë0
con |= cfg; // ÉèÖÃconfigÖµ
__raw_writel(con, reg); // дÈëеÄGPXCON
return 0;
}
return ret;
} // end s3c_gpio_cfgpin
ÕâÀïÉæ¼°µ½ÁËÒ»¸öÖØÒªµÄÊý¾Ý½á¹¹£¬s3c_gpio_chip£¬´ËÊý¾Ý½á¹¹±È½Ï¸´ÔÓ£¬ÎÒÌù³öÕâ¸öÊý¾Ý½á¹¹µÄ½á¹¹Í¼£º
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Õâ¸öÖØÒªµÄÊý¾Ý½á¹¹ÖпÉÒԼǼÿ¸öGPIOËùÐèÒªµÄËùÓÐÊý¾Ý£¬ºóÃæ»áÓöµ½µÄs3c24xx_gpios[]½á¹¹Ìå¾ÍÊǸýṹÌåµÄ¼¯ºÏ£¬ÃèÊöÁËоƬÖÐËùÓеÄGPIO¶Ë¿Ú£¬Ö®ºóÎÒÃÇÐèҪʱʱ»ØÍ·¿´¿´Õâ¸ö½á¹¹¡£
ÎÒÃÇÏÈÀ´¿´s3c_gpiolib_getchip £¬ËüʵÏÖÁË·µ»Ø¶ÔÓ¦pinÖµµÄGPIO½á¹¹ÌåÊ×Ö¸ÕëµÄ¹¦ÄÜ
#include>
static inline struct s3c_gpio_chip *s3c_gpiolib_getchip(unsigned int pin)
{
struct s3c_gpio_chip *chip;
if (pin > S3C_GPIO_END) //Èç¹û³¬¹ýGPJ(32)¾Íreturn NULL
return NULL;
chip = &s3c24xx_gpios[pin/32]; //¸ù¾ÝÆ«ÒÆ£¬¼ÆËã³ö¶ÔÓ¦pinµÄGPIO½á¹¹ÌåÖ¸Õë
return ((pin - chip->chip.base) < chip->chip.ngpio) chip : NULL;
// ÕâÀïÑéÖ¤£¬Èç¹ûpinÆ«ÒÆ³¬¹ýÁËGPIOµÄ¸öÊý£¬ËµÃ÷³ö´íÁË£¬·ñÔò¾Í·µ»Ø¸ÃGPIOµÄ½á¹¹ÌåÖ¸Õë
}
»ØÏëÒÔÏÂ֮ǰs3c2410_gpio_cfgpinÖУ¬ÎÒÃÇ´«ÈëµÄ²ÎÊýÊÇled_table[i]ºÍ led_cfg_table[i]£¬
/* GPIO sizes for various SoCs:
*
* 2442
* 2410 2412 2440 2443 2416
* ---- ---- ---- ---- ----
* A 23 22 25 16 25
* B 11 11 11 11 9
* C 16 15 16 16 16
* D 16 16 16 16 16
* E 16 16 16 16 16
* F 8 8 8 8 8
* G16 16 16 16 8
* H 11 11 9 15 15
* J -- -- 13 16 --
* K -- -- -- -- 16
* L -- -- -- 15 7
* M -- -- -- 2 2
*/
struct s3c_gpio_chip s3c24xx_gpios[] = {
[0] = {
.base = S3C2410_GPACON, // datasheetÉϵØÖ·Îª0x56000000
//#define S3C2410_GPACON S3C2410_GPIOREG(0x00)
#define S3C2410_GPIOREG(x) ((x) + S3C24XX_VA_GPIO)
#define S3C24XX_VA_GPIO ((S3C24XX_PA_GPIO - S3C24XX_PA_UART) + S3C24XX_VA_UART)
S3C24XX_PA_GPIOÏ൱ÓÚ(0x15600000)
S3C24XX_PA_UARTÏ൱ÓÚ(0x15000000)
#define S3C_VA_UART S3C_ADDR(0x01000000) /* UART */
#define S3C_ADDR_BASE 0xF6000000
#ifndef __ASSEMBLY__
#define S3C_ADDR(x) ((void __iomem __force *)S3C_ADDR_BASE + (x))
#else
#define S3C_ADDR(x) (S3C_ADDR_BASE + (x))
#endif
0x15600000-15000000+F7000000 ÕâÀïµÄS3C2410_GPACONÓ¦¸ÃÔõôË㣿
.pm = __gpio_pm(&s3c_gpio_pm_1bit),
.config = &s3c24xx_gpiocfg_banka, // ÉèÖÃGPIOµÄº¯ÊýÖ¸Õë
static struct s3c_gpio_cfg s3c24xx_gpiocfg_banka = {
.set_config = s3c_gpio_setcfg_s3c24xx_a,
.get_config = s3c_gpio_getcfg_s3c24xx_a,
};
.chip = {
.base = S3C2410_GPA(0), //»ùµØÖ·£¬Ò²ÊÇÆ«ÒÆÁ¿
.owner = THIS_MODULE,
.label = "GPIOA",
.ngpio = 24,
.direction_input = s3c24xx_gpiolib_banka_input,
.direction_output = s3c24xx_gpiolib_banka_output,
},
},
[1] = {
.base = S3C2410_GPBCON,
.pm = __gpio_pm(&s3c_gpio_pm_2bit),
.chip = {
.base = S3C2410_GPB(0),
.owner = THIS_MODULE,
.label = "GPIOB",
.ngpio = 16,
},
},
[2] = {
.base = S3C2410_GPCCON,
.pm = __gpio_pm(&s3c_gpio_pm_2bit),
.chip = {
.base = S3C2410_GPC(0),
.owner = THIS_MODULE,
.label = "GPIOC",
.ngpio = 16,
},
},
[3] = {
.base = S3C2410_GPDCON,
.pm = __gpio_pm(&s3c_gpio_pm_2bit),
.chip = {
.base = S3C2410_