设为首页 加入收藏

TOP

verilog写的LCD1602 显示(二)
2017-10-10 12:21:11 】 浏览:5745
Tags:verilog LCD1602 显示
LE ; end
else if(write_flag==1) begin c_state<= n_state ; end else c_state<=c_state ; end always @(*)begin case (c_state) IDLE: n_state = SET_FUNCTION ; SET_FUNCTION: n_state = DISP_OFF ; DISP_OFF: n_state = DISP_CLEAR ; DISP_CLEAR: n_state = ENTRY_MODE ; ENTRY_MODE: n_state = DISP_ON ; DISP_ON : n_state = ROW1_ADDR ; ROW1_ADDR: n_state = ROW1_0 ; ROW1_0: n_state = ROW1_1 ; ROW1_1: n_state = ROW1_2 ; ROW1_2: n_state = ROW1_3 ; ROW1_3: n_state = ROW1_4 ; ROW1_4: n_state = ROW1_5 ; ROW1_5: n_state = ROW1_6 ; ROW1_6: n_state = ROW1_7 ; ROW1_7: n_state = ROW1_8 ; ROW1_8: n_state = ROW1_9 ; ROW1_9: n_state = ROW1_A ; ROW1_A: n_state = ROW1_B ; ROW1_B: n_state = ROW1_C ; ROW1_C: n_state = ROW1_D ; ROW1_D: n_state = ROW1_E ; ROW1_E: n_state = ROW1_F ; ROW1_F: n_state = ROW2_ADDR ; ROW2_ADDR: n_state = ROW2_0 ; ROW2_0: n_state = ROW2_1 ; ROW2_1: n_state = ROW2_2 ; ROW2_2: n_state = ROW2_3 ; ROW2_3: n_state = ROW2_4 ; ROW2_4: n_state = ROW2_5 ; ROW2_5: n_state = ROW2_6 ; ROW2_6: n_state = ROW2_7 ; ROW2_7: n_state = ROW2_8 ; ROW2_8: n_state = ROW2_9 ; ROW2_9: n_state = ROW2_A ; ROW2_A: n_state = ROW2_B ; ROW2_B: n_state = ROW2_C ; ROW2_C: n_state = ROW2_D ; ROW2_D: n_state = ROW2_E ; ROW2_E: n_state = ROW2_F ; ROW2_F: n_state = ROW1_ADDR ; default: n_state = n_state ; endcase end assign lcd_rw = 0; always @(posedge clk or negedge rst_n)begin if(rst_n==1'b0)begin lcd_rs <= 0 ; //order or data 0: order 1:data end else if(write_flag == 1)begin if((n_state==SET_FUNCTION)||(n_state==DISP_OFF)|| (n_state==DISP_CLEAR)||(n_state==ENTRY_MODE)|| (n_state==DISP_ON ) ||(n_state==ROW1_ADDR)|| (n_state==ROW2_ADDR))begin lcd_rs<=0 ; end else begin lcd_rs<= 1; end end else begin lcd_rs<=lcd_rs; end end always @(posedge clk or negedge rst_n)begin if(rst_n==1'b0)begin lcd_data<=0 ; end else if(write_flag)begin case(n_state) IDLE: lcd_data <= 8'hxx; SET_FUNCTION: lcd_data <= 8'h38; //2*16 5*8 8位数据 DISP_OFF: lcd_data <= 8'h08; DISP_CLEAR: lcd_data <= 8'h01; ENTRY_MODE: lcd_data <= 8'h06; DISP_ON : lcd_data <= 8'h0c; //显示功能开,没有光标,且不闪烁, ROW1_ADDR: lcd_data <= 8'h80; //00+80 ROW1_0: lcd_data <= row_1 [127:120]; ROW1_1: lcd_data <= row_1 [119:112]; ROW1_2: lcd_data <= row_1 [111:104]; ROW1_3: lcd_data <= row_1 [103: 96]; ROW1_4: lcd_data <= row_1 [ 95: 88]; ROW1_5: lcd_data <= row_1 [ 87: 80]; ROW1_6: lcd_data <= row_1 [ 79: 72]; ROW1_7: lcd_data <= row_1 [ 71: 64]; ROW1_8: lcd_data <= row_1 [ 63: 56]; ROW1_9: lcd_data <= row_1 [ 55: 48]; ROW1_A: lcd_data <= row_1 [ 47: 40]; ROW1_B: lcd_data <= row_1 [ 39: 32]; ROW1_C: lcd_data <= row_1 [ 31: 24]; ROW1_D: lcd_data <= row_1 [ 23: 16]; ROW1_E: lcd_data <= row_1 [ 15: 8]; ROW1_F: lcd_data <= row_1 [ 7: 0]; ROW2_ADDR: lcd_data <= 8'hc0; //40+80 ROW2_0: lcd_data <= row_2 [127:120]; ROW2_1: lcd_data <= row_2 [119:112]; ROW2_2: lcd_data <= row_2 [111:104]; ROW2_3: lcd_data <= row_2 [103: 96]; ROW2_4: lcd_data <= row_2 [ 95: 88]; ROW2_5: lcd_data <= row_2 [ 87: 80]; ROW2_6: lcd_data <= row_2 [ 79: 72]; ROW2_7: lcd_data <= row_2 [ 71: 64]; ROW2_8: lcd_data <= row_2 [ 63: 56]; ROW2_9: lcd_data <= row_2 [ 55: 48]; ROW2_A: lcd_data <= row_2 [ 47: 40]; ROW2_B: lcd_data <=
首页 上一页 1 2 3 下一页 尾页 2/3/3
】【打印繁体】【投稿】【收藏】 【推荐】【举报】【评论】 【关闭】 【返回顶部
上一篇SDRAM 学习(三)之command 下一篇FPGA编程—组合逻辑编码器等veril..

最新文章

热门文章

Hot 文章

Python

C 语言

C++基础

大数据基础

linux编程基础

C/C++面试题目